Sr. Staff ASIC Design Engineer @ Autonomous Driving Technology Leader
RecogniAbout the role
About Recogni:
Artificial intelligence (AI) is transforming our world. It can perform cognitive functions that previously only humans could do, such as perceiving interactions across different environments with the ability to quickly learn and then solve complex problems. At Recogni we have innovative approaches to machine learning, high resolution imaging, perception processing, and high-performance computation with industry-leading low power efficiency. We're a well funded, fast-paced startup company with headquarters in San Jose, CA, and Munich, Germany; we also have many talented team members working remotely. We're at the leading edge of advancing the latest research and product improvements for Al inference solutions that will make Al even more useful for compelling new applications.
About the role: As a Sr. Staff Engineer on Recogni’s ASIC team, you will be responsible for the microarchitecture and design implementation of a high-performance and low-power convolutional neural network accelerator ASIC that forms the core of the company’s flagship perception module product for autonomous driving applications.This ASIC’s design closely couples novel computational accelerator units with 3rd-party SoC IP blocks to form an end-to-end vision perception module that achieves record-breaking computational performance at low power.Your responsibilities will be wide-ranging and run the gamut of microarchitecture design and documentation, Verilog RTL implementation, selecting and integration 3rd-party IP blocks, working closely with design verification engineers, running frontend synthesis and working with a backend team on place-and-route guidance and timing closure.
Responsibilities:- Author micro-architecture specifications and participate in specification and test plan reviews.
- Architect and implement complex RTL designs.
- Scope third party IP requirements and solicit vendors.
- Integrate CPU and other relevant IPs into the CPU sub-system.
- Collaborate with the physical design team to resolve implementation and timing issues and to optimize power.
- Analyze code coverage and provide feedback to the verification team to achieve coverage closure.
- Perform diagnostic and post-silicon validation tests, as well as assist with software bring-up in the lab.
Required Qualifications:
- 10+ years of ASIC design experience with a demonstrable track record of RTL logic design in multi-million gate ASICs with Verilog or System Verilog.
- Experience in IP integration, specifically CPU IP into SoC.
- Knowledge of ARM/RISC-V/MIPS Architectures, Memory hierarchy, Cache coherency, Virtual memory, Multicore CPU operation
- Familiarity with AMBA/APB/AXI Protocol
- Familiarity with processor peripheral interfaces like SPI, eMMC, *MII, GPIO, I2C ....
- Hands-on experience in all aspects of the ASIC development process with proficiency in front-end tools and methodologies.
- Familiarity with low power design. UPF flow for defining power intent of chips with multiple power domains
- Previous experience with timing closure at high frequencies is a plus.
- Interest to explore AI architectures for convolution, transformer and other kinds of workloads
- Self-starter and highly-motivated to work in a dynamic start-up environment.
- B.S. (M.S. preferred) degree in Electrical or Computer engineering.
- Ground floor opportunity with the team; be part of shaping one of the most exciting new companies.
- Learning and development opportunities from a highly diverse and talented peer group, including experts in a wide range of fields, from Artificial Intelligence & Computer Vision to Systems & Device Engineering.
- Competitive benefits package including Medical, Vision, Dental
- Perks including meals, snacks, drinks and us!
- Sharp, motivated co-workers in a fun office environment
- Employee Stock Purchase Plan
- Flexible work hours & generous PTO policy
- Put people first. We only succeed when our people succeed.
- Ethics and integrity always; Being open, honest, and respectful of everyone.
- Think Big. Be ambitious and have
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