Senior Memory Module Design Engineer

For more than 30 years, SMART Modular Technologies has been helping customers around the world enable high-performance computing through the design, development and advanced packaging of specialty memory solutions. Our robust portfolio ranges from today’s leading-edge technologies to standard and legacy DRAM and Flash storage products. We provide standard, ruggedized and custom memory and storage solutions that meet the needs of diverse applications in high-growth markets.

 

Overview

SMART is seeking a Senior DRAM Module Design Engineer responsible for the development of DIMM and custom memory module designs for leading-edge, high-performance server and embedded applications. This job provides the opportunity to work closely with the customers, engineering, manufacturing and test groups. The job requires analytical problem-solving skill, ability to work independently and on multiple projects.

 

Responsibilities

• Perform Module Design Engineering activities such as writing design specifications, schematic capture, component selection, working with Layout Engineers for PCB design, and post-layout SI/PI simulation.
• Validate designs in the lab to ensure design requirements are met.
• Perform research as required to define, specify, and develop products.
• Root-cause analysis to identify issues raised by testing or customer returns.
• Make recommendations for product/process corrections and improvements
• Develop positive relationships with other engineering, manufacturing, and test groups.

 

Qualifications

• BS or MS in electrical engineering or equivalent
• 10+ years of high-speed memory interface related professional work experience
• Strong knowledge of electrical engineering, analog/digital circuit, and power electronics fundamentals
• Schematic capture using Orcad CIS and experience working with a centralized part library and design process
• Familiar with Cadence PCB layout tool and experience completing design release and working with layout engineers to determine component placement, routing topology and design constraints.
• Working knowledge of standard methodologies in PCB design, including stack up and impedance control.

• Experience post-layout simulation that includes Signal Integrity (SI) and timing analysis and Power Integrity (PI) simulation.
• Ability to use high-speed oscilloscope and logic analyzer to perform bring-up and make Design Validation Testing (DVT) measurements, and for troubleshooting.
• Working knowledge of JEDEC DDR3/DDR4/DDR5 standards.
• Communicate effectively verbally and in writing with internal team members as well as customers with logical thinking and a proactive problem solving mindset.

 

Location

Newark, CA

 

Travel

No travel required

 

Compensation & Benefits

The base pay range that the Company reasonably expects to pay for this position in Newark, CA is $148,000 - $175,000; the pay ultimately offered may vary based on business considerations, including job-related knowledge, skills, experience, and education. The position is bonus-eligible, and there are medical, dental, and vision benefits available. There is a 401k saving plan and other benefits, such as Paid Time Off, Life Insurance, and an Employee Assistance Plan.   

 

Diversity and Inc