Electrical Engineer, Systems Power Modeling, Spectacles, L5

Snap Inc is a technology company. We believe the camera presents the greatest opportunity to improve the way people live and communicate. Snap contributes to human progress by empowering people to express themselves, live in the moment, learn about the world, and have fun together. The Company’s three core products are Snapchat, a visual messaging app that enhances your relationships with friends, family, and the world; Lens Studio, an augmented reality platform that powers AR across Snapchat and other services; and its AR glasses, Spectacles.

Spectacles is home to our hardware products with a world-class research & development team. We are focused on pushing the boundaries of what a camera can be, specifically overlaying computing on the real world. Next Generation Spectacles are our first pair of glasses that bring augmented reality to life. 

We’re looking for a System Power Modeling Engineer, Devices to join Team Snap! Working from our hardware design centers in either Palo Alto or Santa Monica, CA, you’ll join the Snap Lab Hardware Engineering group responsible for the system power model. Our objective is to deliver on first-in-class consumer electronics hardware. 

What you’ll do:

• Power Model Ownership: Develop, maintain, and continuously improve a system-level power model that accurately predicts the power consumption of all hardware components and software activities across different operational states and use cases

• Load Characterization: Understand, characterize, and model power consumption for a wide array of system loads, including SoCs, CPUs, GPUs, memory, displays, wireless radios, sensors, actuators, and peripherals across varying functional modes

• Battery Modeling: Integrate battery model (ESR) into use-case based run time estimates as well as HW system DCR and grounding requirements

• Use Case Analysis: Collaborate with product and system architecture teams to define and model various use cases and translate into quantifiable power profiles

• Early Power Estimation: Extract and integrate pre-silicon power estimates and power breakdown data for chips under development, providing crucial feedback for architecture choices

• Cross-Functional Collaboration: Partner effectively with various submodule teams (e.g., silicon design, software, firmware, display, camera, wireless, audio, thermal) to gather accurate power consumption data, understand their respective power budgets, and identify optimization opportunities

• Benchmarking & Validation: Hand-on measurement of  power and performance data from prototypes and compare it against model predictions across HW and SW features. Debug discrepancies, identify root causes, and refine models to improve accuracy and predictive capability.

• Power Optimization Guidance: Provide data-driven insights and recommendations to hardware and software teams for power reduction strategies, trade-offs, and design optimizations.

• Documentation: Create and maintain comprehensive documentation for power models, assumptions, methodologies, test procedures, and analysis reports.

Knowledge, Skills & Abilities

• Knowledge of system architecture and subsystem metrics that impact performance for SOCs, Camera, Connectivity, Cellular, PMICs, and Battery.

• Knowledge of power management concepts and power delivery

• Excellent communication and collaboration skills

Minimum Qualifications:

• BS/BA degree in Electrical Engineering, related field, or equivalent years of experience

• 7+ years of relevant experience in electrical or hardware engineering 

Preferred Qualifications: 

• MS/PhD in Electrical Engineering or related field

• Demonstrated experience developing and shipping consumer electronic products at scale

• Experience with integrated circuit design such as VHDL or analog design

• Knowledge of layout strategies to meet P