Senior RF/DSP Engineer - In-Space Systems

Application close date:

Applications will be accepted on an ongoing basis until the requisition is closed.

At Blue Origin, we envision millions of people living and working in space for the benefit of Earth. We’re working to develop reusable, safe, and low-cost space vehicles and systems within a culture of safety, collaboration, and inclusion. Join our team of problem solvers as we add new chapters to the history of spaceflight!  

The role is part of the In-Space Systems business unit, which is focused on addressing two of the most compelling challenges in spaceflight today: space infrastructure and increasing mobility on-orbit.

We are seeking a Senior RF/DSP Engineer to architect, design and develop algorithms for the next-generation of high-performance phased array systems for use in mission-critical, high-reliability environments. You will develop algorithms necessary to solve a wide range of (digital signal processing) DSP challenges. The ideal candidate brings a deep background in digital beam forming and active electronically scanned arrays for communication systems.

This person will also serve as a single thread leader for the development of RF communications systems and software defined radios (SDRs) for Blue Origin’s spacecraft. You will lead a multidisciplinary team for development of these RF systems from early concepts to product prototypes to initial flight units. In this role, you will leverage your understanding of SDR and FPGA hardware, firmware, digital signal processing and algorithms, and software for both transmit and receive paths. You and your team will develop custom software that will enhance our target radio performance by taking advantage of aspects of the protocol as well as the physical layer attributes. This position will report into the In-Space Systems RF Comms team.

Responsibilities include but are not limited to: 

• Develop, execute, and manage the plan for the design, development, test, and qualification of software defined radios (SDR) and other RF systems for spacecraft communications 
• Research and design of DSP algorithms in MATLAB.
• Develop hardware implementations of the DSP algorithms in Simulink based on floating-point MATLAB simulations and validate results against MATLAB implementations.

• Generate fixed-point implementations in Simulink and compare against MATLAB implementations ensuring performance requirements.
• Support implementation support for target hardware.
• Generation of test vectors to support testing by the digital design group.
• Own the performance of the DSP algorithm implementation on target platforms (FPGAs/ASICs).
• Work with digital designers to realize power and area efficient digital implementations.

Minium Qualifications: 

• 14 years of relevant professional experience with a Bachelor's degree in Computer Science, Computer Engineering, Electrical Engineering or other STEM (Science, Technology, Engineering or Mathematics) discipline; 12 years with Masters; 9 years with a PhD
• Demonstrated experience in the development, prototyping, and testing of complex RF components for aerospace applications 
• Experience with VHDL or System Verilog design for Software Defined Radios.
• Experience with the Electronic Design Automation (EDA) Tools, Quartus, Vivado, or similar.
• Experience in FPGA physical constraints and achieving timing closure.
• Experience with board or system level debug using test equipment such as oscilloscopes and logic analyzers.
• Experience with algorithms for adaptive detection and beamforming applications.

Preferred Qualifications:

• Experience with active electronically scanned arrays (AESAs) or phased arrays
• Knowledge of RF, modem, and/or networking fundamentals
• Ability to design implementations with migration path from vendor specific FPGAs to ASICs where typical vendor primitives for RAMs, multipliers, etc. are not available and need to be generated from scratch.
• Extensive experience on design and develop the physical layer core algorithms, such as signal estimation and detection, channel estimation, equalization, coding theory, beamforming, timing recovery, frequency synchronization, automatic gain control, etc.
• Experience of RTL and gate-level simulations and related debugging, often applied to DFT verification (scan sims, MBist sims, on RTL and/or back annotated gate level netlist,)
• Knowledge of a full EDA vendor DFT tool suite, Siemens Tessent or similar)
• Knowledge of STA tools like Synopsys Primetime or Cadence Tempus is an advantage
• Experience evaluating third party solutions for integration and or trade vs in-house development.