Sr. Principal Custom Memory Architect

About Marvell

Marvell’s semiconductor solutions are the essential building blocks of the data infrastructure that connects our world. Across enterprise, cloud and AI, automotive, and carrier architectures, our innovative technology is enabling new possibilities. 

At Marvell, you can affect the arc of individual lives, lift the trajectory of entire industries, and fuel the transformative potential of tomorrow. For those looking to make their mark on purposeful and enduring innovation, above and beyond fleeting trends, Marvell is a place to thrive, learn, and lead. 

Your Team, Your Impact

The Custom Cloud Solutions (CCS) Architecture team is responsible for the developing novel solutions and defining product and technology requirements of Marvell’s cutting-edge data center ASICs. As part of cross-functional organization, we collaborate with world’s leading data center companies, internal engineering teams, partners with external IP, and technology companies to bring next generation SoC for cloud data center to reality.

What You Can Expect

• Develop high-level specifications, product requirements, and solution architecture for HBM/DDR memory for custom compute products, and drive innovations for memory controller. 

• Drive innovations and help shaping Marvell’s HBM/DDR memory architecture strategy and roadmap, working with customers, internal stakeholders, and industry partners. 

• Develop micro-architecture, detailed implementation specification, and verification and validation test-plan working closely with development teams. 

• Collaborate with development, validation and operations team to ensure end-to-end product qualification and testing meeting all product requirements and KPIs. 

• Develop and integrate memory system models and analyze performance (throughput, latency, QoS etc.) 

What We're Looking For

• Bachelor’s degree in Computer Science, Electrical Engineering or related fields and 15+  years of related  professional experience or Master’s / PhD degree in Computer Science, Electrical Engineering or related fields with 8+  years of experience. 

• Deep understanding and prior experience in analyzing and specifying DDR/HBM memory subsystem for data-center compute or XPUs. Design experience of HBM/DDR memory controller is a strong plus. 

• In depth knowledge of memory technology such as HBM, LPDDR4/5 and relevant JEDEC memory standards 

• Proven track record of developing system modeling for memory system to analyze performance and area/power trade-off. 

• Strong expertise in developing ECC and RAS features for server-class product 

• Strong conceptual thinking, problem solving and communication skills 

• Ability to effectively collaborate across multiple teams and across multiple geographies 

Expected Base Pay Range (USD)

177,380 - 265,700, $ per annum

The successful candidate’s starting base pay will be determined based on job-related skills, experience, qualifications, work location and