Principal Digital Design Engineer, Reader IC
ImpinjAbout the role
<div class="content-intro"><p><span style="font-family: arial, helvetica, sans-serif;">Impinj is a leading RAIN RFID provider and Internet of Things pioneer. We’re inventing ways to connect every thing to the Internet <strong>— </strong>including retail apparel, retail general merchandise, healthcare items, automobile parts, airline baggage, food and much more. With more than 100 billion items connected to date, and multiple Fortune 500 enterprises around the world using our platform, we solve for a better understanding of our world. If it’s a thing, we’re working to connect it.<strong> </strong>Join Impinj and help us realize our <strong>vision of a boundless IoT— connecting trillions of everyday items to the Internet.</strong> </span></p></div><h2><span style="font-family: arial, helvetica, sans-serif;">Team Overview</span></h2> <p>We are looking for a Senior Staff OR Principal Digital Design Engineer to join the Impinj RAIN RFID Reader IC Engineering team to own the microarchitecture definition and front-end implementation of key subsystems for Impinj’s next generation of Reader ICs. In this position, you will use your experience in SoC subsystem definition, IP block microarchitecture, digital design and design for tests to take Impinj’s next generation of Reader ICs from concept through to production.</p> <h2>What You'll Do</h2> <ul> <li>Own microarchitecture definition and subsystem development for key IP blocks of Impinj's next-generation RAIN RFID Reader ICs, from concept through implementation, silicon characterization, and high-volume production.</li> <li>Collaborate with Product Management and Systems Engineering to define innovative features and performance targets that extend Impinj's leadership in the Reader IC market.</li> <li>Drive adoption of state-of-the-art SoC integration tools, flows, and methodologies, partnering with the CAD team to significantly advance design environments and ensure production-quality A0 tape-out.</li> <li>Serve as the SoC DFX authority, overseeing scan insertion, ATPG execution, and fault coverage review in close partnership with product test engineering.</li> <li>Evaluate and integrate third-party IP — including Ethernet, USB, and DDR4/DDR5 controllers — ensuring seamless SoC integration and timing convergence.</li> <li>Oversee subsystem definition, design, and implementation to deliver an industry-leading RAIN RFID Reader IC on time and at high quality.</li> <li>Coordinate across disciplines to define priorities, align workflows, and remove execution barriers.</li> <li>Mentor senior and staff engineers, setting technical direction and raising the bar on design quality and methodology across the organizatio
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