Intern, Logic Pathfinding Lab Research Scientist – DTCO

Please Note:

To provide the best candidate experience amidst our high application volumes, each candidate is limited to 10 applications across all open jobs within a 6-month period. 

Advancing the World’s Technology Together
Our technology solutions power the tools you use every day--including smartphones, electric vehicles, hyperscale data centers, IoT devices, and so much more. Here, you’ll have an opportunity to be part of a global leader whose innovative designs are pushing the boundaries of what’s possible and powering the future. 

We believe innovation and growth are driven by an inclusive culture and a diverse workforce. We’re dedicated to empowering people to be their true selves. Together, we’re building a better tomorrow for our employees, customers, partners, and communities.

What You’ll Learn

• Project Overview: Standard Cell Library Design and SRAM block modeling for Advanced Logic Nodes
• Skills You'll Learn:
  • Standard cell design for advanced technologies (MBCFET and beyond)
  • Advanced SRAM bitcell, periphery and data block design and SRAM block modeling

What You’ll Do

• Design standard cell library for MBC and 3D stacked devices.
• Create and optimize advanced SRAM bitcell design, periphery circuits, data blocks.
• Evaluate feasibility and trade-offs in Logic and SRAM for different technology options

Location: Onsite at our San Jose office 5 days a week 

Reports to: Principal Engineer, Logic Pathfinding Lab

• Design standard cell library for MBC and 3D stacked devices.
• Create and optimize advanced SRAM bitcell design, periphery circuits, data blocks.
• Evaluate feasibility and trade-offs in Logic and SRAM for different technology options
• Collaborate closely with Samsung DTCO engineers
• Collaborate with university or consortia researchers
• Complete other responsibilities as assigned.

 What You Bring

• Graduate student enrolled in a Master or PhD program in VLSI technology and design
• Must have at least 1 academic quarter/semester remaining
• Working experience on DTCO including standard cell design and layout synthesis
• Proficient on programming
• Good knowledge of device architecture beyond FinFET
• You’re inclusive, adapting your style to the situation and diverse global norms of our people.
• An avid learner, you approach challenges with curiosity and resilience, seeking data to help build understanding.
• You’re collaborative, building relationships, humbly offering support and openly welcoming approaches.
• Innovative and creative, you proactively explore new ideas and adapt quickly to change.

 

What We Offer
The pay range below is for all roles at this level across all US locations and functions. Individual pay rates depend on a number of factors—including the role’s function and location, as well as the individual’s knowledge, skills, experience, education, and training. 

This is in addition to our diverse package of benefits centered around the wellbeing of our employees and their loved ones. In addition to the usual Medical/Dental/Vision, our inclusive rewards plan empowers our people to care for their whole selves. An investment in your future is an investment in ours.

Relocation Support Live 50+ miles away from your new office? No worries! We'll provide a stipend to help support your move.
Housing Stipend Signing a lease on a new place for your summer internship? We'll help you pay your way with a monthly stipend.
Give Back With a charitable giving match and frequent opportunities to get involved, we take an active role in supporting the community.
Prioritize Emotional Wellness With on-demand apps and paid therapy sessions, you’ll have support no matter where you are.
Stay Fit Eating well and being active are important parts of a healthy life. Our onsite Café and gym, plus virtual classes, make it easier.
Embrace Flexibility Benefits are best when you have the space to use them. That’s why we facilitate a flexible environment so you can find the right balance for you.

Hourly Base Pay Rate$28