Principal Engineer, SI-PI

<p><span style="font-family: helvetica, arial, sans-serif;">We are <strong>CARIAD</strong>, an automotive software development team with the Volkswagen Group. Our mission is to make the automotive experience safer, more sustainable, more comfortable, more digital, and more fun. To achieve that we are building the leading tech stack for the automotive industry and creating a unified software platform for over 10 million new vehicles per year. We’re looking for talented, digital minds like you to help us create code that moves the world. Together with you, we’ll build outstanding digital experiences and products for all Volkswagen Group brands that will transform mobility. Join us as we shape the future of the car and everyone around it.</span></p> <p><span style="font-family: helvetica, arial, sans-serif;">​<strong><u>Role Summary:</u></strong></span></p> <p><span style="font-family: helvetica, arial, sans-serif;"><strong><u>​</u></strong>The Principal Engineer, SI/PI (Signal Integrity / Power Integrity) is the electrical performance expert for CARIADs high-speed automotive compute platforms (infotainment, ADAS ECUs). Scope spans compute modules and carrier boards, high-speed connectors/cables, and return-path/grounding considerations from concept through EVT/DVT/PVT. This role ensures clean high-speed signaling and robust power delivery across PCB, package, and system interconnects to prevent noise, jitter, data errors, EMI failures, and system instability. The engineer influences schematic and layout decisions early, builds predictive models and simulations, and validates designs in the lab—partnering closely with SoC vendors, hardware/layout, EMC, and system validation teams to meet performance, EMC, and reliability targets.</span></p> <p><span style="font-family: helvetica, arial, sans-serif;"><strong><u>Role Responsibilities:</u></strong></span></p> <ul> <li style="font-family: helvetica, arial, sans-serif;"><span style="font-family: helvetica, arial, sans-serif;">Own channel budgets and SI sign-off reports per interface/program (margin targets, assumptions, and waiver rationale).</span></li> <li style="font-family: helvetica, arial, sans-serif;"><span style="font-family: helvetica, arial, sans-serif;">Analyze and optimize high-speed channels (PCIe, DDRx, Ethernet, MIPI/SerDes) for loss, crosstalk, reflections, jitter, and margin.</span></li> <li style="font-family: helvetica, arial, sans-serif;"><span style="font-family: helvetica, arial, sans-serif;">Define routing/topology guidelines (impedance, spacing, length matching, reference planes) and review PCB layouts for compliance.</span></li>