Senior Mixed-Signal Intellectual Property Register Transfer Level Engineer

Microsoft Silicon, Cloud Hardware, and Infrastructure Engineering (SCHIE) is the team behind Microsoft’s expanding Cloud Infrastructure and responsible for powering Microsoft’s “Intelligent Cloud” mission. SCHIE delivers the core infrastructure and foundational technologies for Microsoft's over 200 online businesses including Bing, MSN, Office 365, Xbox Live, Teams, OneDrive, and the Microsoft Azure platform globally with our server and data center infrastructure, security and compliance, operations, globalization, and manageability solutions. Our focus is on smart growth, high efficiency, and delivering a trusted experience to customers and partners worldwide and we are looking for passionate engineers to help achieve that mission. 

As Microsoft's cloud business continues to grow the ability to deploy new offerings and hardware infrastructure on time, in high volume with high quality and lowest cost is of paramount importance. To achieve this goal, Silicon Manufacturing and Package Engineering team is instrumental in defining and delivering operational measures of success for hardware manufacturing, improving the planning process, quality, delivery, scale and sustainability related to Microsoft cloud hardware. We are looking for Senior Mixed-Signal Intellectual Property  Register Transfer Level (IP RTL) Design Engineer who look for customer focused solutions, insight and industry knowledge to envision and implement future technical solutions that will manage and optimize the Cloud infrastructure.  

We are looking for a Senior Mixed-Signal Intellectual Property  Register Transfer Level (IP RTL) Design Engineer to join the team. 

Microsoft’s mission is to empower every person and every organization on the planet to achieve more. As employees we come together with a growth mindset, innovate to empower others, and collaborate to realize our shared goals. Each day we build on our values of respect, integrity, and accountability to create a culture of inclusion where everyone can thrive at work and beyond.

Responsibilities

• Specifying and micro-architecting digital blocks and collaborate with analog design team to define digital/analog interfaces.

• Write RTL code for blocks based on architectural specifications. 

• Participate in the design verification and bring-up of such blocks by writing substantial assertions, debugging code, and otherwise interacting with the design verification team. 

• Define, create, and maintain project documentation, including design documents with analysis reports. 

• Develop micro-architectural understanding of mixed-signal systems on IP and SOC level.

• Describe the power intent of the design through UPF. 

• Perform design quality checks such as Lint, CDC, RDC, Low Power Intent, Synthesis, Logic Equivalence. 

• Understand Dataflow and Clocking requirements and drive solutions for timing critical paths.  

• Automate tasks using scripting for efficiency. 

• Delight your customers who receive your deliverable by providing high quality functional block on schedule and with professional integrity. 

• Collaborate with cross functional team members with respect and with One Microsoft mentality to establish synergies. 

• Challenge the status quo with a growth mindset. 

Embody our Culture and Values<