Sr. Principal Engineer Electrical - Firmware (FPGA)
Northrop GrummanAbout the role
Description
At Northrop Grumman, our employees have incredible opportunities to work on revolutionary systems that impact people's lives around the world today, and for generations to come. Our pioneering and inventive spirit has enabled us to be at the forefront of many technological advancements in our nation's history - from the first flight across the Atlantic Ocean, to stealth bombers, to landing on the moon. We look for people who have bold new ideas, courage and a pioneering spirit to join forces to invent the future, and have fun along the way. Our culture thrives on intellectual curiosity, cognitive diversity and bringing your whole self to work — and we have an insatiable drive to do what others think is impossible. Our employees are not only part of history, they're making history.Northrop Grumman Aeronautics Systems has an opening for a Sr. Principal Firmware Engineer to join our team of qualified, diverse individuals within our Software organization located in Rancho Bernardo, CA.
As an FPGA design engineer you will design, implement and verify HDL to manage I/O devices on embedded computers in a new avionics’ product line. In collaboration with the product architect, electrical designers, software engineers and systems engineers you will develop requirements, define HW/SW interfaces and determine verification approaches. You will establish integrated product development workflows, processes and tools to reduce time to market for our safety critical avionics designs.
Responsibilities:
FPGA Architecture & Design
Define FPGA architecture and logic design to support avionics computer functions
Translate system and board-level requirements to detailed FPGA requirements and design specifications
Collaborate with the Product Architect to partition system functionality between hardware, firmware and software
HDL Coding & Implementation
Develop synthesizable HDL code for FPGA-based designs
Implement interfaces such as PCIe, SPI, I2C, UART, Ethernet and Serial
Simulation, Verification and Validation
Create comprehensive test benches and simulation environment to verify FPGA
Perform functional, timing and synthesis-level simulations to ensure deterministic and reliable operation
Support hardware-in-the-loop and system-level integration testing with embedded processors and avionics systems
Participate in formal verification and validation activities
Synthesis, Place & Route, and Timing Closure functionality
Perform synthesis, implementation and timing closure using Vivado
Optimize resource utilization, power consumption, and performance through iterative design and analysis
Generate and review timing constraints to ensure reliable performance across all environmental conditions
Basic Qualifications:
Basic qualifications for a Sr. Principal Engineer include a Bachelor's in Science, Technology, Engineering or Math (STEM) and at least 8 years of experience, a Master's Degree in STEM with 6 years of experience, or a PhD Degree with 3 years of experience
Digital circuit design experience, including simulation & schematic capture through test and integration
Prior hands-on prototyping and debug experience testing complex digital subsystems, such as complex circuit card development involving FPGAs, and/or
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