HBM DRAM DFT Member Technical Staff

Our vision is to transform how the world uses information to enrich life for all.

Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever.

For 45 years, Micron Technology, Inc. has redefined innovation with the world’s most advanced memory and semiconductor technologies. We’re an international team of visionaries and scientists, developing groundbreaking technologies that are transforming how the world uses information to enrich life. 

We are looking for a HBM DFT Design Engineer. Are you passionate about systems and architecture for the next generation of high-performance memory that has wide-ranging applications and inspires change in memory systems? In the HBM Design Engineering team at Micron, we believe in the one-team approach you will be encouraged to break down boundaries and collaborate to make the entire high bandwidth system a success. 

Our Opportunity Summary:

As an HBM DFT Design Engineer, you will work in an innovative and dynamic team and will be responsible for designing and analyzing analog & mixed-signal circuits for DRAM & Interface die. This includes simulating, optimizing, and floor planning circuits. In this position, you will collaborate with Micron’s worldwide design and verification teams and support the efforts of multi-functional teams such as Product Engineering, Test, Probe, Process Integration, Assembly, and Marketing to proactively craft HBM products that optimize all manufacturing functions and ensure the best performance, power, cost, quality, reliability, time-to-market, and customer happiness. 

What’s Encouraged Daily:

Contribute to the development of new HBM products by assisting with the overall design, and layout.

• Interpret product specifications and design circuits to meet required functionality. 

• Design analog/mixed-signal CMOS circuits in deep sub-micron technologies (5 – 40 nm)

• Design and develop custom DFT circuits such as Instrumentation Amp, ADC, oscillators, synchronous design, clock tree, and critical internal analog and digital voltage readouts.

• Architect and develop control test bits and Anti-fuse circuits of the Interface die.

• Pair with high-speed interface PHY and Analog designers to ensure smooth interface between the DFT circuits and other Interface die circuits

• Work closely with Product Engineering to understand testing needs and translate them into circuit design solutions.

• Work closely with the DRAM design team to implement Cube testing capabilities.

• Participate in new circuit conception and design as needed.

• Active involvement in problem-solving and implementing opportunities for improvement.

• Participate in new circuit conception and design as needed. 

• Perform circuit simulations using standard industry simulators such as FINESIM, HSPICE, and VERILOG 

• Responsible for reliability verification 

• Assist in design validation, reticle experiments, and required tape-out revisions. 

• Contributes experienced technical knowledge to advance innovative technical solutions.

• Provides advice and counsel to senior management on significant technical issues. 

Oversee and manage the layout process 

• Lead floor-planning process, including placement and routing optimization. 

• Optimize design rules for cost, performance, and functionality. 

• Import layout parasitic information into the circuit simulation environment. 

Maintain Technical Expertise and Provide Training 

• Contribute to cross-group communication work towards standardization and group success. 

• Aid in design documentation and communicating best-known practices to the entire department. 

• Participate in continuing education and competitor analysis. 

• Proactively solicit feedback from Standards, CAD, modeling, and verification groups to ensure the design quality. 

• Drive innovation into the future Memory generations within a dynamic work environment 

How To Qualify:

• BSEE or greater

• 8+ years of relevant Engineering or Design Engineering experience

• Extensive knowledge of CMOS circuit design, device physics, and analog & mixed-signal design techniques. 

• Should know about ESD.

• Experience with Power Delivery circuits such as Bandgap, LDO, and Bias circuits

• Experience with power network analysis 

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