Senior Analog Mixed Signal Verification Engineer

Qorvo (Nasdaq: QRVO) supplies innovative semiconductor solutions that make a better world possible. We combine product and technology leadership, systems-level expertise and global manufacturing scale to quickly solve our customers' most complex technical challenges. Qorvo serves diverse high-growth segments of large global markets, including consumer electronics, smart home/IoT, automotive, EVs, battery-powered appliances, network infrastructure, healthcare and aerospace/defense. Visit www.qorvo.com to learn how our diverse and innovative team is helping connect, protect and power our planet.

 

SUMMARY:

Qorvo’s fast-growing Power Management division focusing on Power loss protection, PMICs, Motor Control, and Battery Management solutions for a wide range of Mobile, Consumer, IOT and Industrial applications is looking for an experienced Top-level Design Verification Engineer to create next generation and world-class designs in power management solutions.

 

RESPONSIBILITIES: 

• Collaborate with internal system engineers, analog designers, and digital designers in the US and Asia to verify world-class analog power management ICs.
• Collaborate with teams in Asia and the US to ensure effective communication and coordination throughout the IC verification process.
• Work with test and characterization engineers to develop simulation-based test verification strategies, test-benches, and test cases as well as troubleshoot analog/digital design issues.
• Work closely with system, analog, and digital team to understand and verify system and sub-system functions and specifications.
• Utilize power management knowledge, including LDO, buck converter, boost converter, etc., to verify the performance and functionality of analog mixed-signal IC designs.
• Communicate and follow through with design team to resolve issues found during verification.
• Document verification activities, including test plans, procedures, and reports, to ensure traceability and knowledge sharing.
• Assist Validation and Test engineers in de-bugging designs in the lab and test platform for mass production as necessary.
• Create and verify System Verilog (or equivalent) models, test benches, and automated verification simulations for mixed signal circuit blocks.

 

QUALIFICATIONS:

• Master's or Ph.D. degree in Electrical Engineering or a related field, with a focus on analog/mixed-signal circuit design and/or verification and 5+ years' experience.
• 3+ years' demonstrated experience in AMS verification or circuit modeling including LDO, buck converter, boost converter, etc.
• Knowledge of common Analog building blocks such as LDO, Amplifiers, Bandgap and other reference generators, Oscillators, etc.
• Experience in circuit analysis for function extraction and debug.
• Experience in chip-level and subsystem-level modeling and simulation of AMS circuits.
• Excellent problem-solving and debugging skills.
• Effective communication and collaboration skills to work with cross-functional teams located in Asia and the US.
• Strong attention to detail and the ability to prioritize tasks to meet project deadlines.

 

Recommended Qualifications:

• Experience in Top-down design methodology
• TCSH, CSH, or python scripting
• Experience with SV-UDN/EEnet modeling techniques and challenges
• Experience in both Gui-based and command-line based simulation methodologies.
• Experience in developing and executing verification plans, test benches, and test cases.
• Familiarity with the UVM and UVM-MS
• Familiarity with SV Assertions and Functional Coverage

 

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