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Senior ASIC/FPGA Hardware Engineer for Cryptographic Systems

Draper
United Statesfull_timeVerifiedPosted 4 Sept 2025
💰 $205,750/yr($82,300/yr$205,750/yr)

About the role

Overview:

Draper is an independent, nonprofit research and development company headquartered in Cambridge, MA. The 2,000+ employees of Draper tackle important national challenges with a promise of delivering successful and usable solutions. From military defense and space exploration to biomedical engineering, lives often depend on the solutions we provide. Our multidisciplinary teams of engineers and scientists work in a collaborative environment that inspires the cross-fertilization of ideas necessary for true innovation. For more information about Draper, visit www.draper.com.

Job Description Summary:

A Senior ASIC/FPGA Hardware Engineer for Cryptographic Systems architects, specifies, and ensures proper design & implementation of hardware-based security solutions. The engineer develops the architecture and specification for ASIC or FPGA-based hardware designs. They translate those requirements to front-end RTL designers and guide the back-end implementation team to achieve a secure hardware design. The engineer also works with systems-level designers to develop documentation, test plans, and software interfaces to the hardware solution.

The candidate must demonstrate knowledge of cryptography systems and hardware security, to include:
• Asymmetric/public key cryptosystems such as ECC, RSA etc.
• Symmetric cryptography such as AES (and its block cipher modes), MAC etc.
• Cryptographic protocols/schemes such as key exchange, digital signature, key wrap etc.
• Security design such as memory isolation, secure enclave etc.
• Secure protocols such as secure boot, attestation, key split, certificates, MFA etc
Experience with Digital Hardware Design:
• Knowledge of computer architecture and ASIC/FPGA design
• Develop RTL code using System Verilog, Verilog, or VDHL
• Translate high level system requirements into specifications and design guidelines for front/back-end designers to bring security design to implementation and optimization

Job Description:

Duties/Responsibilities

  • Design and simulate circuits at transistor-level to implement architecture and requirement specifications

  • Contribute to system-level design

  • Optimize hardware designs for performance, power, and cost

  • Evaluate the hardware feasibility of complex algorithms and requirements

  • Independently contribute to complex chip architectures and designs

  • Independently drive solutions to complex problems - develop requirements, propose ways forward when customer requirements are unclear or incomplete, and adapt appropriately to changes in requirements

  • Contribute to business development and proposal activities

  • Develop, document, and teach best practices to less experienced engineers

  • Perform or guide physical layout, including floor-planning, and simulate circuits using extracted parasitics.

  • Perform other duties as assigned


Skills/Abilities

  • Proficiency in integrated circuit design

  • Understanding of integrated circuits, semiconductors, and general computer architecture

  • Ability to write detailed design specifications

  • Ability to manage small technical teams

  • Excellent verbal and written communication skills

  • Excellent mathematical skills

  • Excellent organizational skills and attention to detail

  • Excellent time management skills with the proven ability to meet deadlines

  • Strong analytical and problem-solving skills

  • Ability to prioritize tasks

  • Demonstrate strong organization, planning, and time management skills to achieve program goals

Education

  • Requires a bachelor's degree in Engineering, or related field. Masters degree preferred.


Experience

  • Requires 5-7 years of experience with a bachelor's degree, or 3-5 years of experience with a master's degree, or 0-2 years of experience with a PhD in ASIC Hardware Engineering or related.

Additional Job Description:

Preferred qualifications:

  • Cryptography:

    Knowledge of post-quantum cryptography (PQC) is a plus

    Knowledge of side channel analysis is a plus

    Knowledge of lightweight cryptography is a plus

  • Hardware Security:

    Knowledge of secure key storage using different technologies is a plus

    Knowledge of hardware primitives such as TRNG and PUF is a plus

    Knowledge of anti-tamper and TEMPEST is a plus

  • Mathematical knowledge of number theory such as finite field, modular arithmetic, coding

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Company

Draper

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