Staff/Sr. Staff RTL Design Engineer - QGOV

Company:

Qualcomm Technologies, Inc.

Job Area:

Engineering Group, Engineering Group > ASICS Engineering

General Summary:

Role: 

As a Design Engineer, you’ll play a critical role in shaping cutting-edge digital designs. Your responsibilities will include:

• Micro-Architecture: Designing micro-architecture for both simple and complex digital, interface blocks.
• RTL Development: Developing RTL (Register Transfer Level) code using industry best practices. This includes handling multi-clock designs, high-frequency requirements, low power, and low latency considerations while ensuring high performance.
• Debugging and Post-Silicon Bring-Up: Troubleshooting and debugging issues during the development process and supporting post-silicon bring-up activities.
• Documentation: Creating comprehensive design documentation to ensure clarity and maintainability.
• Design Optimization: Optimizing designs for key metrics such as area, power, and performance.
• Cross-Functional Collaboration: Collaborating with cross-functional teams, including DFT (Design for Testability), Implementation, Verification, Emulation, and Firmware teams.

**Must be in San Diego full time, 5 days a week

Ideal candidate will have:

• 6-10+ years of work experience with RTL/FPGA design (Verilog, System verilog), embedded system architecture and Verification 
• Bachelor's degree in computer science, Electrical/Electronics Engineering, Engineering, or related field and 5+ years of Hardware Engineering or related work experience.
  OR
  Master's degree in computer science, Electrical/Electronics Engineering, Engineering, or related field and 5+ year of Hardware Engineering or related work experience.
  OR
  PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field.

Preferred Qualifications:

• Positive Attitude: Bring a fun-loving attitude and a passion for inclusively solving problems.
• Experience: 5+ years of ASIC design experience
• RTL Expertise: System Verilog Design, Linting, CDC, Synthesis (FPGA and ASIC) 
• Testing: Building the test suites for design validation 
• Emulation: understanding of Emulation and prototyping flows for the design and validation in Lab is a big Plus. 
• Complex Digital Logic Design: Experience with designing complex digital logic blocks and sub systems (CPU, GPU, DSP, Always on Systems, Digital interfaces (PCIe, UART, I2c, DDRx, SPI, USB).
• ISA Familiarity: Knowledge of ISAs (Instruction Set Architectures) such as ARM THUMB or RISC-V.
• Processor/Microcontroller System Design: Understanding of processor or microcontroller system design.
• Multi-Power Domain and Multi-Clock Domain Designs: Experience with designs spanning multiple power domains and clock domains.
• Scripting/Automation Languages: Proficiency in scripting or automation languages like Python or Perl.
• Industry Standard Digital Tools: Familiarity with state-of-the-art industry-standard digital design tools.
• Challenges of Lower Node Technologies: Awareness of challenges faced when working with lower node technologies.

If you’re excited about pushing the boundaries of digital design and collaborating with diverse teams, we encourage you to apply!

Minimum Qualifications:

• Bachelor's degree in Science, Engineering, or related field and 6+ years of ASIC design, verification, validation, integration, or related work experience.
OR
Master's degree in Science, Engineering, or related field and 5+ years of ASIC design, verification, validation, integration, or related work experience.
OR
PhD in Science, Engineering, or related field and 4+ years of ASIC design, verification, validation, integration, or related work experience.