Staff Application Engineer — HDD SoC

About Marvell

Marvell’s semiconductor solutions are the essential building blocks of the data infrastructure that connects our world. Across enterprise, cloud and AI, and carrier architectures, our innovative technology is enabling new possibilities. 

At Marvell, you can affect the arc of individual lives, lift the trajectory of entire industries, and fuel the transformative potential of tomorrow. For those looking to make their mark on purposeful and enduring innovation, above and beyond fleeting trends, Marvell is a place to thrive, learn, and lead. 

Your Team, Your Impact

Goal of Section:
Convey impact of the business group they will be joining on Marvell and the world.

Questions To Answer In This Section:
• What can’t Marvell do if they do not have this team to execute?
• What projects is this team responsible for delivering? What do they work on every day?
• Why should you work on this team vs another team doing the same project at another company?
• How is this technology used in the world that most people would recognize?

What You Can Expect

• Lead functional and performance validation of HDD SoC devices, including power analysis and electrical characterization across process, voltage, and temperature (PVT) corners.
• Develop comprehensive test plans, drive test automation initiatives, and author detailed test reports to support silicon bring-up and product qualification.
• Collaborate with design, architecture, and validation teams to reproduce, debug, and resolve issues raised by internal stakeholders and external customers.
• Serve as a key technical resource for Field Application Engineers (FAEs), Test Engineers, and the Documentation team — translating complex silicon behavior into actionable guidance.
• Engage directly with global customers on technical escalations, providing root cause analysis and resolution for HDD SoC and mixed-signal subsystem issues.
• Support pre- and post-silicon bring-up activities, including board-level debug, firmware interaction, and signal integrity analysis.
• Contribute to characterization and modeling of mixed-signal IP blocks such as read/write channels, PLLs, ADCs, and analog front-end circuits.
• Document findings, methodologies, and best practices to grow the team's institutional knowledge base.

What We're Looking For

• M.S. in Electrical Engineering (or equivalent) with 5+ years of relevant industry experience.
• 4+ years of hands-on experience in one or more of the following: product development engineering, post-silicon application engineering, hardware test engineering, post-silicon validation, or silicon bring-up and debug on mixed-signal ASICs.
• 1+ years of global technical customer support experience, with demonstrated ability to communicate complex technical issues clearly and professionally.
• Strong programming proficiency in C, Python, and MATLAB for test automation, signal processing, and data analysis.
• Solid understanding of high-speed communication channels, particularly HDD read channel architectures; will also consider candidates with SerDes/PCIe PHY background.
• In-depth knowledge of analog and digital circuit design principles, signals and systems theory, and control systems theory.
• Proven track record of diagnosing and resolving complex hardware and silicon-level issues.
• Hands-on experience with standard R&D lab equipment: digital sampling oscilloscopes, signal generators, spectrum analyzers, network analyzers, and related instruments.
• Strong verbal and written communication skills, with a history of producing high-quality technical documentation.

Preferred Qualifications

• Familiarity with current HDD storage technologies.
• Working knowledge of HDD mechanical and magnetic recording principles, servo control, and channel signal processing.
• Background in communications theory, digital signal processing (DSP), or statistical signal analysis.
• Experience scripting in TCL, Perl, or Shell for lab automation and regression testing.
• Familiarity with version control systems (Git) and collaborative engineering workflows.

Expected Base Pay Range (USD)

131,010 - 196,300, $ per annum

The successful candidate’s starting base pay will be determined based on job-related skills, experience, qualifications, work location and market conditions. The expected base pay range for this role may be modified based on market conditions.

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