Senior FPGA Design & Verification Engineer – Terwave
Blue OriginAbout the role
Application close date:
Applications will be accepted on an ongoing basis until the requisition is closed.At Blue Origin, we envision millions of people living and working in space for the benefit of Earth. We’re working to develop reusable, safe, and low-cost space vehicles and systems within a culture of safety, collaboration, and inclusion. Join our team of problem solvers as we add new chapters to the history of spaceflight!
Blue Origin is pioneering the future of space-based communications with TeraWave, a revolutionary satellite communications network designed to deliver symmetrical data speeds of up to 6 Tbps anywhere on Earth. This multi-orbit constellation will consist of optically interconnected satellites in low Earth orbit (LEO) and medium Earth orbit (MEO), providing enterprise-grade connectivity for critical operations worldwide.Overview
Blue Origin is seeking a Senior FPGA Design and Verification Engineer to develop the digital signal processing and physical layer implementation for the Terawave next generation modem. In this role, you will architect, design, implement, and verify FPGA-based modem and physical layer solutions that enable robust, high-reliability communications for our spacecraft and ground systems.
Using latest generation hardware and modern design methodologies, you will work across the full development lifecycle – from architecture and algorithm mapping through implementation, verification, and hardware bring-up – collaborating closely with systems, DSP/communications, RF, and avionics engineering teams.
Responsibilities
Architect and design FPGA implementations of modem and physical layer functions on a SoC FPGA platform.
Translate communications system and DSP algorithm requirements into efficient, resource-optimized RTL (VHDL/Verilog/SystemVerilog).
Develop and execute comprehensive verification strategies, including self-checking testbenches, constrained-random verification, and coverage-driven methodologies (e.g., UVM).
Perform timing closure, resource optimization, and design implementation for high-performance FPGA and system-on-chip (SoC) platforms.
Support integration and hardware bring-up, including lab testing, debug, and validation against system-level performance requirements.
Collaborate with DSP/communications engineers to co-design and optimize physical layer algorithms for fixed-point FPGA implementation.
Contribute to design reviews, documentation, and design-for-test/design-for-reliability practices consistent with aerospace-grade development.
Support radiation-tolerant and high-reliability design considerations for space-based applications.
Minimum Qualifications
Bachelor's degree or above in Electrical Engineering, Computer Engineering, or equivalent.
7+ years of experience in FPGA design and verification.
Strong proficiency in RTL design using VHDL and/or Verilog/SystemVerilog.
Experience implementing DSP or communications/modem functions in FPGAs (e.g., modulation/demodulation, FEC, filtering, digital front-ends).
Proficiency with FPGA development toolchains (e.g., Xilinx/AMD
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