Job Description Summary

This Senior Architect position will be responsible for guiding and developing ASICs for applications within Magnetic Resonance (MR) systems.  The successful candidate will interface with ASIC simulation & design teams, and Hardware Subsystem teams to help deliver mixed-signal and digital ASIC design solutions.  The candidate will engage with module owners and senior engineers to ensure ASICs meet stringent performance requirements and will support the teams as designs are prototyped and productized on circuit boards.

Job Description

This role will ideally sit in GEHC Waukesha, WI location, but is open for any GEHC sites. We are also open to considering remote candidates but must be willing to travel 20% of the time to GEHC site(s).

Essential Responsibilities

Duties include (but are not limited to):
 

• Guide ASIC development leveraging experience in mixed-signal (RF ADC/DAC & associated demodulation, digital filtering, etc functional blocks) and digital ASIC design

• Familiarity with System Verilog and VHDL code to understand FPGA-based designs; familiar with transitioning FPGA solutions to ASIC

• Scope and define ASIC test and verification plans, ensuring test coverage & debugging are key parts of initial designs.

• Support verification using UVM or equivalent industry standard methodology

• Write detailed functional specifications that document newly created designs and support product introduction.

• Provide technical support to team throughout product development and implementation process.

• Model, build, test, and modify product prototypes using working models or theoretical models constructed with simulation.

• Provide input requirements & definition to firmware team to develop low-level drivers for communication links.

• Select hardware and material, assuring compliance with specifications and product requirements.

• Engaging in all phases of new product introduction: concept, architecture, documentation, design, prototype, test, supplier interfaces, manufacturing introduction and service support.

• Update knowledge and skills in order to keep up with rapid advancements in ASIC/mixed-signal processes & technologies.

• Identifying and developing new opportunities to leverage Strategic Sourcing objectives and Common Technology initiatives in the MR product line.

Qualifications/Requirements

• BS in Electrical Engineering or similar with at least 10 years mixed signal ASIC design experience.
• Experience in full cycle mixed-signal ASIC development & realization, including understanding of all involved tasks to drive a design to tape-out
• Familiarity with analog ASIC design tools (Synopsys, Cadence, etc).
• Demonstrated experience in digital ASIC (System Verilog/VHDL) design and simulation tools (QuestaSim, Xcelium, etc)
• Demonstrated experience in MATLAB or equivalent simulation/modeling tool
• Working knowledge of project management processes and procedures.
• Experience with typical related electrical test equipment such as oscilloscopes, logic analyzers

Desired Characteristics

• Masters degree or PhD in Electrical Engineering or similar 15+ years relevant work experience Experience with a Healthcare imaging modality and working in a highly regulated environment ASIC experience with designs having the following characteristics:
  - Low noise analog (LNA, mixer, filter, ADC, etc)
  - High speed digital (LVDS, DSP, etc)
  - Complex synchronized clock domains
  - Verification through UVM or similar methodology
• Experience with FPGA tools and design (Altera/Intel, Xilinx/AMD, Lattice) Schematic capture experience
• Working knowledge of PWA board bring-up and system integration experience
• Demonstrated experience in design of standard bus formats such as PCIe, CAN, Ethernet, LVDS
• Demonstrated self-starter, energizing, results oriented, and able to multi-task
• Excellent teamwork, coordination and communication skills
• Experienced in developing project plans and estimates
• Effective oral and written communication skills
• EMC compatible design/solution experience
• Design for Reliability and Manufacturability experience
• Working knowledge of GEHC tools and processes EQPM, MyWorkshop, Cadence
• DFSS or Green Belt/Black Belt Certified (Six Sigma Design/Quality)
• Circuit design and simulation tool experience

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For U.S. based positions only, the pay range for this position is $126,480.00-$189,720.00 Annual. It is not typical for an individual to be hired at or near the top of the pay ran