Senior Test Engineer - Semiconductor NPI

Location: San Diego, CA (Hybrid MON-THU in office, Friday remote)

Our Team:

Semtech’s Global Product & Test Engineering group is a cross-site team of engineers responsible for bringing every Semtech semiconductor product from first silicon to high-volume production. We work across multiple business units—including our high-speed communications and capacitive/analog sensing product lines—developing the test solutions, hardware, and methodologies that ensure quality and reliability at scale. Our California teams are based in San Diego and Irvine, and we operate as a functional center of excellence that supports product lines globally.

Job Summary:

We are looking for a Senior NPI Test Engineer to join our San Diego team as the senior technical contributor on a growing group of test engineers. This role is a key position: you will own full NPI test programs from design-for-test planning through production release, working across both our high-speed communications and capacitive sensing product lines. In the near term, your first project will be a SIP program on the Advantest V93000 platform. Over time, the role evolves toward an even split between signal integrity products and capacitive sensing products, with the opportunity to grow into a principal-level engineering role.

You’ll be joining a team where designers, marketing, product engineering, and test are all under one roof—problems get solved collaboratively, not thrown over the wall. The San Diego team is early in their careers, so you’ll have real mentorship impact and high visibility with leadership from day one.

Responsibilities:

NPI Test Development & Execution

• Own end-to-end test development for complex mixed-signal products, from DFT/testability requirements through characterization, qualification, and production release.
• Develop and debug test programs on the Advantest V93000 platform (SmarTest 7/8) for signal integrity products, including high-speed SerDes, CDRs, and transimpedance amplifiers.
• Support capacitive sensing product test development on the Teradyne uFlex platform, including capacitive sensing, force/haptics, and related analog product lines.
• Design test hardware (load boards, probe interfaces) and coordinate fabrication timelines to align with silicon tape-out schedules.
• Set up and operate ATE equipment and probers, troubleshoot hardware issues in the lab, and generate product files for production—this is a hands-on role, not purely a desk job.

Cross-Functional Collaboration

• Partner with IC design teams during the design phase to define DFT hooks, internal monitors, and testability requirements that enable fast, reliable production testing.
• Represent test engineering in architecture reviews, gate meetings, and test readiness reviews across both Signal Integrity and Capacitive Sensing business units.
• Collaborate with product engineering on characterization strategies, correlation methodologies, and customer-facing test specifications.
• Ensure seamless transfer of test solutions to OSATs and production sites, targeting first-pass success rates above 99%.

Mentorship & Continuous Improvement

• Serve as the senior technical resource on the San Diego test team, mentoring early-career engineers and building the next generation of test leaders.
• Create reusable test IP, libraries, and documentation that accelerate NPI cycles across product families.
• Drive continuous improvement initiatives targeting reductions in test time, cost, and NPI cycle time.

Required Qualifications:

These are genuine must-haves. If you meet these, we want to hear from you—even if you don’t check every box in the Preferred section below.

• Bachelor’s degree in Electrical Engineering, Computer Engineering, or a related discipline.
•  8+ years of semiconductor test engineering experience, with hands-on ATE program development for silicon products.
•  Proven track record owning and delivering NPI test programs from concept through production release.
•  Expert-level proficiency with the Advantest V93000 platform (SmarTest 7/8).
•  Strong programming skills in C/C++, Python, and TCL.
• Working knowledge of analog/mixed-signal DFT techniques (BIST, scan, boundary scan).
• Solid foundation in statistical process control and quality methodologies (SPC, Cpk, GR&R).

Preferred Qualifications:
Any combination of the following will strengthen your candidacy:
High-Speed / Signal Integrity Experience

• Experience with high-speed signal integrity, jitter analysis, and BER testing.
• RF/microwave test techniques at frequencies beyond 40GHz.
• Familiarity