#10953 - DfT Engineer

Qualitest is looking for a Design for Test Engineer for a worldwide client, an American company, the largest semiconductor company in the world and the one that invented the series of x86 processors, processors found in many PC personal computers.

Responsibilities:

• Deliver DFT inserted RTL to the Client DFT team.
• This includes RTL insertion of all DFT features according to the DFT specifications provided by the Client
• BSc Electric Engineer from well-established Technical University

Requirements

• DFT Scan insertion
• ATPG simulations for Scan insertion
• Identify and fix DRC issues related to Scan insertion
• Experience working on Mentor Graphics (Siemens EDA) flow using the Tessent tool
• Experience working on Mentor Graphics (Siemens EDA) DFT Hierarchy flow
• Background in logic verification with a good understanding of logic design concepts.
• Familiarity with the ASIC design flow.

Benefits

• Private health subscription + hospitalization package
• Private dental subscription
• Gym subscription
• Vouchers/bonuses for special events (birthday, Christmas, Easter, etc)
• Meal vouchers of 35 RON/working day
• Ability to work with a global company and immerse in a variety of international projects with different cultures within the IT industry
• Access to cucutting-edgend state of the art technologies current with the everyday evolvement of technologies
• Development opportunities with free access to over 3000+ training courses and peer-to-peer mentoring support