Job Details:

Job Description: 

About the Technology Development Group:

Technology Development (TD) is the heart and soul of Moore’s Law at Intel, enabling Intel to create world-changing technology that enriches the lives of every person on earth. TD’s more than 13,000 employees drive breakthrough research, develop next generation process and packaging technologies, while also running high volume manufacturing operations in its state-of-the-art facilities in Oregon and Arizona.

The Design Enablement team in TD works closely with the technology team to maximize the value proposition of the technology for our customers thru Design Technology Co-Optimization (DTCO) and delivers the Process Design Kits (PDKs) and Foundation IP (FIP) that designers need to support their product design work and fully leverage the technology.  The DE organization scope includes technology design rules & models, technology and IP testchips, Process Design Kits (PDKs) and Foundational IP.  The Foundational IP team is responsible for developing the essential building blocks for Intel’s advanced nodes.  This includes Digital, Memory, and GPIO/mixed-signal IP solutions.   FIP is the cornerstone of a Foundry’s technology offering.  It is essential for technology definition, yield development, and for achieving the best time-to-market for customers on a new technology node. 

About the Role:

The Foundational IP Group is responsible for developing leadership IPs that power-winning products for our customers and for Intel. The Vice President of Foundational IP directly reports to the CVP of Design Enablement in Intel’s Technology Development organization and is responsible for planning, execution, delivery, and support of foundational IPs such as standard cell libraries, memory compilers, and GIP/mixed signal IP solutions.

This position requires strong analytical, project management, and business partnering/influencing skills. The candidate must have experience driving cross-organizational issues and projects to resolution, excellent written and oral communications skills, and a good understanding of Intel's highly complex products, technologies, and business strategies. The position requires strong business and technical acumen, disciplined process management, problem-solving skills, multitasking ability, and attention to quality and detail. The job is in a fast-paced environment and requires a dynamic individual to succeed. The candidate must be results-oriented, capable of synthesizing and abstracting complex information into clear messages.

Responsibilities Include:

• Leads and managed silicon design teams that span across more than one area of functional development including logic design, circuit design, physical design, and verification.  
• Responsible for enabling teams to execute through clear goal setting, facilitating work, maintaining accountability, driving team results, and applying differentiated performance management.
• Works to continuously improve organization and development processes across all areas of design to improve efficiency and achieve quality standards. 
• Works closely with partners such as the Intel Foundry Services, Intel Technology team, and other parts of Design Enablement to plan the FIP roadmap (content, schedules) to meet Foundry Platform and Internal SoC/IP requirements, including power, performance, area, cost, and schedules.
• Collaborate closely with suppliers such as EDA vendors, Engineering Computing, and internal TFM/Design Automation to ensure necessary dependencies are in place to support FIP execution in a timely manner.
• Budget forecasting (headcount, HW, SW) to ensure smooth operation and no impact on deliverable timelines.

Experience Required:              

• A high performer with 15+ years of demonstratable experience in the development of foundational IP in the semiconductor industry, including one or more of standard cell libraries, memory compilers, and analog IP (GPIOs, PLLs, thermal sensors, etc.).
• Deep working knowledge of all steps of the development process, from architecture definition through the logic level, circuit/layout design, modeling, characterization, and validation.
• Experience aligning with PDK, EDA reference flows, and other components as part of developing FIP for a Technology Platform.
• A combination of business acumen, organization savvy, networking capabilities, and expertise to get results across multiple groups and disciplines.
• Demonstrated ability to understand and interpret industry trends, create and drive strategies, work independently, simultaneously manage diverse and extensive assignments while remaining organized and productive in a complex environment.
• Strong self-initiative, persistence, and ability to deal with a high degree of ambigui