Senior EE -Signal Integrity Interface

Key responsibilities:
· Lead system architecture and design for all high-speed serial and parallel interfaces.
· Lead pre-layout and post-layout simulation flow and create system design requirements for all high-speed interfaces to meet system signal integrity budget.
· Design, build and test rapid prototypes for evaluation of new product ideas or technology concepts.
· Create design documentation, develop schematics, board layout to meet system signal integrity requirements.
· Collaborate closely with cross-functional teams to optimize the overall system of the product from concept to completion.
· Use simulation and lab measurement data to support design troubleshooting and propose corrective actions, drive failure analysis, root cause analysis, and design of experiments to resolve issues.
· Work with suppliers, contractors, and engineering services to ensure that the product is developed on time with high quality.
Requirements:
· 8+ years of experience designing, implementing, and shipping high volume consumer electronics products of medium to high complexity.
· Experience in SI fundamentals, Familiar with PCB materials, Flex design and PCB/FPC manufacturing process.
· Familiar with SI simulation, system level 3D simulation and correlation to solve system design issues such as desense.
· Familiar with High-speed interface protocol, electrical measurement equipment such as VNA, TDR, Bert, Scope
· Experience preferred with x86 PC and or ARM architectures and implementation of high speed serial busses (PCIe, DP, USB4, Thunderbolt, MIPI) and high speed parallel busses such as: memory bus (DDR4/5, etc.)
· Strong problem solving and debugging skills with a solid understanding of core engineering principles, fundamental circuit design, and analytical techniques is required.
· Strong communication skills required, including the ability to clearly express technical concepts in verbal and written forms.