Principal DSP Engineer

About Marvell

Marvell’s semiconductor solutions are the essential building blocks of the data infrastructure that connects our world. Across enterprise, cloud and AI, and carrier architectures, our innovative technology is enabling new possibilities. 

At Marvell, you can affect the arc of individual lives, lift the trajectory of entire industries, and fuel the transformative potential of tomorrow. For those looking to make their mark on purposeful and enduring innovation, above and beyond fleeting trends, Marvell is a place to thrive, learn, and lead. 

Your Team, Your Impact

Marvell’s Architecture team leads the industry in wireline Ethernet communication technologies, delivering solutions for applications ranging from hyperscale data center interconnects to industrial PHYs. Their portfolio spans speeds up to 1.6 Tb/s and supports diverse media types, including optical fibers, high-speed coaxial cables, and shielded/unshielded twisted pair cables. The underlying core technologies that enable these products are state of the art of equalization techniques like Maximum likelihood sequence estimation, timing synchronization, cross talk and echo cancellation techniques, error control coding techniques such as LDPC, product and concatenated codes, combined with architectural and circuit innovations to enable low power high speed implementation of these complex algorithms.

Come join Marvell to work on the DSP and architecture challenges that need to be solved to enable products and technologies that will determine the future direction for the entire industry.

What You Can Expect

• Design and simulate DSP architectures, define key capabilities, performance requirements and drive specifications for both analog and digital designers.

• Create DSP and FEC hardware block specifications appropriate for RTL implementation.

• Perform research activities in digital signal processing for Base-T, SerDes and optical channels

• Work with designers to ensure circuit architecture can be efficiently implemented.

• Develop/perform behavioral modeling of mixed-signal circuit designs for transceivers.

• Provide guidance on test plans for lab characterization once design comes back from fab. 

• Participate in chip lab bring up. Should be comfortable working with lab equipment.

What We're Looking For

• Ph.D., or M.S. in Electrical Engineering, Computer Science or related fields and 3+ years of related design experience. Strong knowledge of communications theory and system design, and digital signal processing. 

• Proficient in C/C++ and Matlab or Python. 

• Familiarity with Ethernet systems is a plus.

• Experience in high-speed DSP, especially FFE/DFE, Clock and Data Recovery (CDR) or FEC (RS, soft decoding, Viterbi algorithm) is a big plus.

• Experience with ADC-based wireline transceivers and/or coherent DSP architectures is a plus.

• Experience with high-speed/time interleaved ADC and the associated calibration algorithms is a plus

• Team player, willing to take on a variety of projects, good listening skills, self-motivated.

Expected Base Pay Range (USD)

154,240 - 231,000, $ per annum

The successful candidate’s starting base pay will be determined based on job-related skills, experience, qualifications, work location and market conditions. The expected base pay range for this role may be modified based on market conditions.

Additional Compensation and Benefit Elements 

At Marvell, we offer a total compensation package with a base, bonus and equity.Health and financial wellbeing are part of the package. That means flexible time off, 401k, plus a year-end shutdown, floating holidays, paid time off to volunteer. Have a question about our benefits packages - health or financial? Ask your recruiter during the interview process.

All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, national origin, sexual orientation, gender identity, disability or protected veteran status.

Any applicant who requires a reasonable accommodation during the selection process should contact Marvell HR Helpdesk at TAOps@marvell.com.

Interview Integrity
 

As part of our commitment to fair and authentic hiring practices, we ask that candidates do not use AI tools (e.g., transcription apps, real-time answer generators like ChatGPT, CoPilot, or note-takin